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 ISP1104
Advanced Universal Serial Bus transceiver
Rev. 01 -- 26 August 2002 Product data
1. General description
The ISP1104 Universal Serial Bus (USB) transceiver is fully compliant with the Universal Serial Bus Specification Rev. 2.0 (full-speed section). It is ideal for use in portable electronic devices, such as mobile phones, digital still cameras, Personal Digital Assistants (PDAs) and Information Appliances (IAs). It allows USB Application Specific Integrated Circuits (ASICs) and Programmable Logic Devices (PLDs) with power supply voltages from 1.65 to 3.6 V to interface with the physical layer of the USB. It has an integrated 5 V to 3.3 V voltage regulator for direct powering via the USB supply line VBUS. It has an integrated voltage detector to detect the presence of the VBUS line voltage (VCC(5.0)). When VBUS (VCC(5.0)) is lost, the pins (D+, D-) can be shared with other serial protocols. The ISP1104 can transmit and receive USB data at full-speed (12 Mbit/s). It allows single and differential input modes selectable by a MODE input. The ISP1104 is available in the HBCC16 package.
2. Features
s s s s s s s s s s s s Complies with Universal Serial Bus Specification Rev. 2.0 (full-speed section) Integrated 5 V to 3.3 V voltage regulator for powering via USB line VBUS VBUS presence indication on pin VBUSDET Used as USB device transceiver or USB transceiver Supports full-speed (12 Mbit/s) serial data rate Stable RCV output during SE0 condition Two single-ended receivers with hysteresis Low-power operation Supports I/O voltage range from 1.65 to 3.6 V 12 kV ESD protection at pins D+, D-, VCC(5.0) and GND Full industrial operating temperature range from -40 to +85 C Available in HBCC16 package.
3. Applications
s Portable electronic devices, such as: x Mobile phone x Digital still camera x Personal Digital Assistant (PDA) x Information Appliance (IA).
Philips Semiconductors
ISP1104
Advanced USB transceiver
4. Ordering information
Table 1: Ordering information Package Name ISP1104W[1] HBCC16 Description plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 x 3 x 0.65 mm Version SOT639-2 Type number
[1]
The ground terminal of the ISP1104W is connected to the exposed diepad (heatsink).
5. Functional diagram
3.3 V V CC(I/O)
VOLTAGE REGULATOR
VCC(5.0) Vreg(3.3)
VBUSDET SOFTCON OE MODE VMO/FSE0(2) VPO/VO(2) SUSPND RCV VP VM LEVEL SHIFTER
Vpu(3.3) 1.5 k D+ D- 33 (1) (1%) 33 (1) (1%)
ISP1104
GND
004aaa035
(1) Use a resistor of 39 1% for a USB v2.0 compliant output impedance range. (2) Pin function depends on the device function, see Section 7.2.
Fig 1. Functional diagram.
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Product data
Rev. 01 -- 26 August 2002
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Philips Semiconductors
ISP1104
Advanced USB transceiver
6. Pinning information
6.1 Pinning
VCC(I/O) 7 VBUSDET 8
SUSPND
5
6
MODE
9
D-
VM VP RCV
4
10
D+ VPO/VO VMO/FSE0
ISP1104W
3 2 GND
(exposed diepad)
11 12
OE
1
16 SOFTCON
15 Vpu(3.3)
14 VCC(5.0)
13
Vreg(3.3)
Bottom view
004aaa036
Fig 2. Pinning diagram HBCC16.
6.2 Pin description
Table 2: Symbol[1] OE Pin description Pin 1 Type I Description input for output enable (CMOS level with respect to VCC(I/O), active LOW); enables the transceiver to transmit data on the USB bus differential data receiver output (CMOS level with respect to VCC(I/O)); driven LOW when input SUSPND is HIGH; the output state of RCV is preserved and stable during an SE0 condition single-ended D+ receiver output (CMOS level with respect to VCC(I/O)); for external detection of single-ended zero (SE0), error conditions and speed of connected device; driven HIGH when no supply voltage is connected to VCC(5.0) and Vreg(3.3) single-ended D- receiver output (CMOS level with respect to VCC(I/O)); for external detection of single-ended zero (SE0), error conditions and speed of connected device; driven HIGH when no supply voltage is connected to VCC(5.0) and Vreg(3.3) suspend input (CMOS level with respect to VCC(I/O)); a HIGH level enables low-power state while the USB bus is inactive and drives output RCV to a LOW level mode input (CMOS level with respect to VCC(I/O)); a HIGH level enables the differential input mode (VPO, VMO) whereas a LOW level enables a single-ended input mode (VO, FSE0); see Table 4 and Table 5 ground supply
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
RCV
2
O
VP
3
O
VM
4
O
SUSPND
5
I
MODE
6
I
GND
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-[2]
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Product data
Rev. 01 -- 26 August 2002
3 of 21
Philips Semiconductors
ISP1104
Advanced USB transceiver
Pin description...continued Pin 7 Type Description Supply voltage for digital I/O pins (1.65 to 3.6 V). When VCC(I/O) is not connected, the pins (D+, D-) are in three-state. This supply pin is totally independent of VCC(5.0) and Vreg(3.3) and must never exceed the Vreg(3.3) voltage. VBUS indicator output (CMOS level with respect to VCC(I/O)). When VBUS is above 4.0 V, then the output is HIGH and when VBUS is below 3.6 V, then the output is LOW. negative USB data bus connection (analog, differential) positive USB data bus connection (analog, differential); connect a 1.5 k resistor to pin Vpu(3.3) driver data input (CMOS level with respect to VCC(I/O), Schmitt trigger); see Table 4 and Table 5 driver data input (CMOS level with respect to VCC(I/O), Schmitt trigger); see Table 4 and Table 5 regulated supply voltage output (3.0 to 3.6 V); a decoupling capacitor of at least 0.1 F is required supply voltage input (4.0 to 5.5 V); can be connected directly to the USB supply line VBUS pull-up supply voltage (3.3 V 10%); connect an external 1.5 k resistor on D+ (full-speed); pin function is controlled by input SOFTCON: SOFTCON = LOW -- Vpu(3.3) floating (high impedance); ensures zero pull-up current SOFTCON = HIGH -- Vpu(3.3) = 3.3 V; internally connected to Vreg(3.3)
Table 2: Symbol[1] VCC(I/O)
VBUSDET
8
O
D- D+ VPO/VO VMO/FSE0 Vreg(3.3) VCC(5.0) Vpu(3.3)
9 10 11 12 13 14 15
AI/O AI/O I I -
SOFTCON
16
I
software controlled USB connection input; a HIGH level applies 3.3 V to pin Vpu(3.3), which is connected to an external 1.5 k pull-up resistor; this allows USB connect or disconnect signalling to be controlled by software
[1] [2]
Symbol names with an overscore (e.g. NAME) indicate active LOW signals. Down bonded to the exposed diepad.
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Product data
Rev. 01 -- 26 August 2002
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ISP1104
Advanced USB transceiver
7. Functional description
7.1 Function selection
Table 3: SUSPND L L H H
[1] [2]
Function table OE L H L H (D+, D-) driving and receiving receiving[1] driving high-Z[1] RCV active active inactive[2] inactive[2] VP/VM active active active active Function normal driving (differential receiver active) receiving driving during `suspend' (differential receiver inactive) low-power state
Signal levels on pins (D+, D-) are determined by other USB devices and external pull-up or pull-down resistors. In the `suspend' mode (pin SUSPND = HIGH), the differential receiver is inactive and the output RCV is always LOW. Out-of-suspend (`K') signalling is detected via the single-ended receivers VP and VM.
7.2 Operating functions
Table 4: FSE0 L L H H Table 5: VMO L L H H Table 6: Driving function using single-ended input data interface [(OE = L) (MODE = L)] VO L H L H Data differential logic 0 differential logic 1 SE0 SE0
Driving function using differential input data interface [(OE = L) (MODE = H)] VPO L H L H Receiving function (OE = H) (D+, D-) differential logic 0 differential logic 1 SE0 RCV L H RCV*[2] VP[1] L H L VM[1] H L L Data SE0 differential logic 1 differential logic 0 illegal state
[1] [2]
VP = VM = H indicates the sharing mode (VCC(5.0) is disconnected). RCV* denotes the signal level on output RCV just before the SE0 state occurs. This level is stable during the SE0 period.
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Product data
Rev. 01 -- 26 August 2002
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ISP1104
Advanced USB transceiver
7.3 Power supply configurations
The ISP1104 can be used with different power supply configurations, which can be changed dynamically. Table 8 provides an overview of the power supply configuration. Normal mode -- Both VCC(I/O) and VCC(5.0) are connected. For 5 V operation, VCC(5.0) is connected to a 5 V source (4.0 to 5.5 V). The internal voltage regulator then produces 3.3 V for USB connections. VCC(I/O) is independently connected to a voltage source (1.65 to 3.6 V), depending on the supply voltage of the external circuit. Disable mode -- VCC(I/O) is not connected and VCC(5.0) is connected. In this mode, the internal circuits of the ISP1104 ensure that the (D+, D-) pins are in three-state and the power consumption drops to the low-power (suspended) state level. Some hysteresis is built into the detection of VCC(I/O) lost. Sharing mode -- VCC(I/O) is connected and VCC(5.0) is below 3.6 V. In this mode, pins (D+, D-) are made three-state and the ISP1104 allows external signals of up to 3.6 V to share the (D+, D-) lines. The internal circuits of the ISP1104 ensure that virtually no current (maximum 10 A) is drawn via the (D+, D-) lines. The power consumption through pin VCC(I/O) and pin VCC(5.0) drops to the low-power (suspended) state level. Pins VP and VM are driven HIGH and pins VBUSDET and RCV are driven LOW to indicate this mode. Some hysteresis is built into the detection of VCC(5.0) lost.
Table 7: Pins VCC(5.0) Vreg(3.3) VCC(I/O) Vpu(3.3) D+, D- VP, VM RCV VBUSDET VPO/VO, VMO/FSE0, MODE, SUSPND, OE, SOFTCON
[1] High impedance or driven LOW.
Pin states in the Disable or Sharing mode Disable mode 5 V input 3.3 V output not present high impedance (off) high impedance invalid[1] invalid[1] invalid[1] high impedance Sharing mode below 3.6 V pulled-down 1.65 to 3.6 V input high impedance (off) high impedance H L L high impedance
Table 8: VCC(5.0) connected connected
Power supply configuration overview VCC(I/O) connected not connected connected Configuration Normal mode Disable mode Sharing mode Special characteristics (D+, D-) and Vpu(3.3) high impedance; VP, VM, RCV: invalid[1] (D+, D-) and Vpu(3.3) high impedance; VP, VM driven HIGH; RCV driven LOW; VBUSDET driven LOW; Vreg(3.3) pulled-down
not connected
[1]
High impedance or driven LOW.
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Product data
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ISP1104
Advanced USB transceiver
8. Electrostatic discharge (ESD)
8.1 ESD protection
The pins that are connected to the USB connector (D+, D-, VCC(5.0) and GND) have a minimum of 12 kV ESD protection. The 12 kV measurement is limited by the test equipment. Capacitors of 4.7 F connected from Vreg(3.3) to GND and VCC(5.0) to GND are required to achieve this 12 kV ESD protection (see Figure 3). The ISP1104 can withstand 12 kV using the Human Body Model and 5 kV using the Contact Discharge Method as specified in IEC 61000-4-2.
R C 1 M charge current limit resistor
RD 1500 discharge resistance A DEVICE UNDER TEST VCC(5.0) Vreg(3.3)
HIGH VOLTAGE DC SOURCE CS 100 pF storage capacitor
B 4.7 F
4.7 F
GND
004aaa145
Fig 3. Human Body ESD test model.
8.2 ESD test conditions
For a detailed report on test set-up and results, send a request to wired.support@philips.com.
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Product data
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ISP1104
Advanced USB transceiver
9. Limiting values
Table 9: Absolute maximum ratings In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC(5.0) VCC(I/O) VI Ilatchup Vesd Parameter supply voltage I/O supply voltage DC input voltage latch-up current electrostatic discharge voltage VI = -1.8 to +5.4 V ILI < 1 A pins (D+, D-), VCC(5.0) and GND other pins Tstg
[1]
Conditions
Min -0.5 -0.5 -0.5 -40
Max +6.0 +4.6 VCC(I/O) + 0.5 100 12000[1] 2000 +125
Unit V V V mA V V C
storage temperature
Testing equipment limits measurement to only 12 kV. Capacitors needed on VCC(5.0) and Vreg(3.3) (see Section 8).
10. Recommended operating conditions
Table 10: Symbol VCC(5.0) VCC(I/O) VI VI(AI/O) Tamb Recommended operating conditions Parameter supply voltage I/O supply voltage input voltage input voltage on type AI/O pins (D+, D-) ambient temperature Conditions Min 4.0 1.65 0 0 -40 Typ 5.0 Max 5.5 3.6 VCC(I/O) 3.6 +85 Unit V V V V C
11. Static characteristics
Table 11: Static characteristics: supply pins VCC(5.0) = 4.0 to 5.5 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Vreg(3.3) ICC Parameter regulated supply voltage output operating supply current Conditions internal regulator option; Iload 300 A transmitting and receiving at 12 Mbit/s; CL = 50 pF on pins (D+, D-) transmitting and receiving at 12 Mbit/s idle: VD+ > 2.7 V, VD- < 0.3 V; SE0: VD+ < 0.3 V, VD- < 0.3 V idle, SE0 or suspend SUSPND = H
[4] [4] [4] [1]
Min 3.0[2] -
Typ 3.3 4
Max 3.6 8[3]
Unit V mA
ICC(I/O) ICC(idle) ICC(I/O)(static) ICC(susp) ICC(dis)
operating I/O supply current supply current during full-speed idle and SE0 static I/O supply current suspend supply current
-
1 -
2[3] 500 20 100 100
mA A A A A
disable mode supply current VCC(I/O) not connected
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ISP1104
Advanced USB transceiver
Table 11: Static characteristics: supply pins...continued VCC(5.0) = 4.0 to 5.5 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Parameter Conditions VCC(5.0) not connected VCC(5.0) not connected; SOFTCON = L; VDx = 3.6 V 1.65 V VCC(I/O) 3.6 V supply lost supply present Vhys(VCC(5.0)) Vth(VCC(I/O)) supply voltage detection hysteresis I/O supply voltage detection threshold VCC(I/O) = 1.8 V Vreg(3.3) = 2.7 to 3.6 V supply lost supply present Vhys(VCC(I/O)) I/O supply voltage detection hysteresis Vreg(3.3) = 3.3 V 1.4 0.45 0.5 V V V 4.1 70 3.6 V V mV Min Typ Max 20 10 Unit A A ICC(I/O)(sharing) sharing mode I/O supply current IDx(sharing) Vth(VCC(5.0)) sharing mode load current on pins (D+, D-) supply voltage detection threshold
[1] [2] [3] [4]
Iload includes the pull-up resistor current via pin Vpu(3.3). The minimum voltage is 2.7 V in the `suspend' mode. Characterized only, not tested in production. Excluding any load current and Vpu(3.3) or Vsw source current to the 1.5 k and 15 k pull-up and pull-down resistors (200 A typ.).
Table 12: Static characteristics: digital pins VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA Leakage current ILI Capacitance CIN Input levels VIL VIH Output levels VOL LOW-level output voltage IOL = 100 A IOL = 2 mA
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Parameter
Conditions
Min
Typ
Max
Unit
VCC(I/O) = 1.65 to 3.6 V LOW-level input voltage HIGH-level input voltage 0.6VCC(I/O) VCC(I/O) - 0.4 pin to GND 0.3VCC(I/O) 0.15 0.4 1[1] 10 V V V V V V A pF
VCC(I/O) - 0.15 -
input leakage current input capacitance
Example 1: VCC(I/O) = 1.8 V 0.15 V LOW-level input voltage HIGH-level input voltage 1.2 0.5 0.15 0.4 V V V V
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Product data
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Philips Semiconductors
ISP1104
Advanced USB transceiver
Table 12: Static characteristics: digital pins...continued VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol VOH Parameter HIGH-level output voltage Conditions IOH = 100 A IOH = 2 mA Example 2: VCC(I/O) = 2.5 V 0.2 V Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA Example 3: VCC(I/O) = 3.3 V 0.3 V Input levels VIL VIH Output levels VOL VOH LOW-level output voltage HIGH-level output voltage IOL = 100 A IOL = 2 mA IOH = 100 A IOH = 2 mA
[1]
Min 1.5 1.25
Typ -
Max -
Unit V V
LOW-level input voltage HIGH-level input voltage
1.7 2.15 1.9
-
0.7 0.15 0.4 -
V V V V V V
LOW-level input voltage HIGH-level input voltage
2.15 2.85 2.6
-
0.9 0.15 0.4 -
V V V V V V
If VCC(I/O) Vreg(3.3), then the leakage current will be higher than the specified value.
Table 13: Static characteristics: analog I/O pins (D+, D-) VCC(5.0) = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Input levels Differential receiver VDI VCM differential input sensitivity differential common mode voltage LOW-level input voltage HIGH-level input voltage hysteresis voltage LOW-level output voltage HIGH-level output voltage OFF-state leakage current RL = 1.5 k to +3.6 V RL = 15 k to GND |VI(D+) - VI(D-)| includes VDI range 0.2 0.8 2.5 V V Parameter Conditions Min Typ Max Unit
Single-ended receiver VIL VIH Vhys Output levels VOL VOH ILZ 2.8[1] 0.3 3.6 1 V V A 2.0 0.4 0.8 0.7 V V V
Leakage current
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ISP1104
Advanced USB transceiver
Table 13: Static characteristics: analog I/O pins (D+, D-)...continued VCC(5.0) = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Capacitance CIN Resistance ZDRV ZDRV2 ZINP RSW Termination VTERM[4] termination voltage for upstream port pull-up (Rpu) 3.0[5] 3.6 V driver output impedance driver output impedance for USB 2.0 input impedance internal switch resistance at pin Vpu(3.3) steady-state drive steady-state drive
[2] [3]
Parameter transceiver capacitance
Conditions pin to GND
Min 34 40.5 10 -
Typ 39 45 -
Max 20 44 49.5 10
Unit pF M
[1] [2] [3] [4] [5]
VOH(min) = Vreg(3.3) - 0.2 V. Includes external resistors of 33 1% on both pins D+ and D-. Includes external resistors of 39 1% on both pin D+ and D-. This range complies with Universal Serial Bus Specification Rev. 2.0. This voltage is available at pins Vreg(3.3) and Vpu(3.3). The minimum voltage is 2.7 V in the `suspend' mode.
12. Dynamic characteristics
Table 14: Dynamic characteristics: analog I/O pins (D+, D-) VCC(5.0) = 4.0 to 5.5 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; see Figure 10; unless otherwise specified. Symbol tFR Parameter rise time Conditions CL = 50 to 125 pF; 10% to 90% of |VOH - VOL|; see Figure 4 CL = 50 to 125 pF; 90% to 10% of |VOH - VOL|; see Figure 4 excluding the first transition from the Idle state excluding the first transition from Idle state; see Figure 7 LOW-to-HIGH; see Figure 7
[1]
Min 4
Typ -
Max 20
Unit ns
Driver characteristics
tFF
fall time
4
-
20
ns
FRFM VCRS Driver timing tPLH(drv)
differential rise/fall time matching (tFR/tFF) output signal crossover voltage driver propagation delay (VPO/VO, VMO/FSE0 to D+, D-) driver propagation delay (VPO/VO, VMO/FSE0 to D+, D-) driver disable delay (OE to D+, D-)
90 1.3
-
111.1 2.0
% V
-
-
18
ns
tPHL(drv)
HIGH-to-LOW; see Figure 7
-
-
18
ns
tPHZ
HIGH-to-OFF; see Figure 5
-
-
15
ns
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ISP1104
Advanced USB transceiver
Table 14: Dynamic characteristics: analog I/O pins (D+, D-)...continued VCC(5.0) = 4.0 to 5.5 V; VCC(I/O) = 1.65 to 3.6 V; VGND = 0 V; Tamb = -40 to +85 C; see Figure 10; unless otherwise specified. Symbol tPLZ tPZH tPZL Parameter driver disable delay (OE to D+, D-) driver enable delay (OE to D+, D-) driver enable delay (OE to D+, D-) Conditions LOW-to-OFF; see Figure 5 OFF-to-HIGH; see Figure 5 OFF-to-LOW; see Figure 5 Min Typ Max 15 15 15 Unit ns ns ns
Receiver timings Differential receiver tPLH(rcv) tPHL(rcv) propagation delay (D+, D- to RCV) propagation delay (D+, D- to RCV) propagation delay (D+, D- to VP, VM) propagation delay (D+, D- to VP, VM) LOW-to-HIGH; see Figure 6 HIGH-to-LOW; see Figure 6 15 15 ns ns
Single-ended receiver tPLH(se) tPHL(se) LOW-to-HIGH; see Figure 6 HIGH-to-LOW; see Figure 6 18 18 ns ns
[1]
Characterized only, not tested. Limits guaranteed by design.
1.65 V logic input t FR, t LR VOH 90% 90% t FF, t LF 0V t PZH t PZL VOH differential data lines
MGS963
0.9 V
0.9 V
t PHZ t PLZ VOH -0.3 V
VCRS VOL +0.3 V
MGS966
10% VOL
10%
VOL
Fig 4. Rise and fall times.
2.0 V differential data lines 0.8 V t PLH(rcv) t PLH(se) VOH logic output VOL 0.9 V 0.9 V t PHL(rcv) t PHL(se) VCRS VCRS
Fig 5. Timing of OE to D+, D-.
1.65 V logic input 0V t PLH(drv) VOH differential data lines
MGS965
0.9 V
0.9 V
t PHL(drv)
VCRS
VCRS
VOL
MGS964
Fig 6. Timing of D+, D- to RCV, VP, VM.
Fig 7. Timing of VPO/VO, VMO/FSE0 to D+, D-.
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Advanced USB transceiver
13. Test information
test point 33 (1) D.U.T. 50 pF V
MBL142
500
V = 0 V for tPZH and tPHZ. V = Vreg(3.3) for tPZL and tPLZ. (1) Complies with USB 1.1. For USB 2.0, a resistor of 39 1% must be used.
Fig 8. Load for enable and disable times.
test point D.U.T. 25 pF
MGS968
Fig 9. Load for VM, VP and RCV.
Vpu(3.3) D.U.T. D+/D- 33 (1) CL 15 k 1.5 k test point
004aaa037
Load capacitance CL = 50 pF (minimum or maximum timing). (1) Complies with USB 1.1. For USB 2.0, a resistor of 39 1% must be used.
Fig 10. Load for D+, D-.
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Advanced USB transceiver
14. Package outline
HBCC16: plastic thermal enhanced bottom chip carrier; 16 terminals; body 3 x 3 x 0.65 mm SOT639-2
b D B A f terminal 1 index area E
vMCAB wMC vMCAB wMC
b1
b2
vMCAB wMC
b2 detail X
vMCAB wMC
e1 Dh e 5 9 y1 C
C y
e e4 1/2 e4 Eh e2
1 16 1/2 e3 e3
13 X A2 A A1
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 0.8 A1 0.10 0.05 A2 0.7 0.6 b 0.33 0.27 b1 0.33 0.27 b2 0.38 0.32 D 3.1 2.9 Dh 1.45 1.35 E 3.1 2.9 Eh 1.45 1.35 e 0.5 e1 2.5 e2 2.5 e3 2.45 e4 2.45 f 0.23 0.17 v 0.08 w 0.1 y 0.05 y1 0.2
OUTLINE VERSION SOT639-2
REFERENCES IEC JEDEC MO-217 JEITA
EUROPEAN PROJECTION
ISSUE DATE 01-11-13
Fig 11. HBCC16 package outline.
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Product data
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Advanced USB transceiver
15. Packaging
The ISP1104W (HBCC16 package) is delivered on a Type A carrier tape, see Figure 12. The tape dimensions are given in Table 15. The reel diameter is 330 mm. The reel is made of polystyrene (PS) and is not designed for use in a baking process. The cumulative tolerance of 10 successive sprocket holes is 0.02 mm. The camber must not exceed 1 mm in 100 mm.
idth
4
A0
K0
W
B0
P1 Type A direction of feed
4
A0
K0
W
B0
elongated sprocked hole Type B
P1 direction of feed
MLC338
Fig 12. Carrier tape dimensions. Table 15: A0 B0 K0 P1 W Type A carrier tape dimensions for the ISP1104W Value 3.3 3.3 1.1 8.0 12.0 0.3 Unit mm mm mm mm mm
Dimension
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Product data
Rev. 01 -- 26 August 2002
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ISP1104
Advanced USB transceiver
16. Soldering
16.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended.
16.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C small/thin packages.
16.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
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Product data
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ISP1104
Advanced USB transceiver
During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications.
16.4 Manual soldering
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
16.5 Package related soldering information
Table 16: Package[1] BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC[4], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO
[1] [2]
Suitability of surface mount IC packages for wave and reflow soldering methods Soldering method Wave not suitable not suitable[3] Reflow[2] suitable suitable suitable suitable suitable
suitable not not recommended[4][5] recommended[6]
[3]
[4] [5] [6]
For more detailed information on the BGA packages refer to the (LF)BGA Application Note (AN01026); order a copy from your Philips Semiconductors sales office. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is suitable for LQFP, QFP and TQFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
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Product data
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ISP1104
Advanced USB transceiver
17. Additional soldering information
17.1 (H)BCC packages: footprint
The surface material of the terminals on the resin protrusion consists of a 4-layer metal structure (Au, Pd, Ni and Pd). The Au + Pd layer (0.1 m min.) ensures solderability, the Ni layer (5 m min.) prevents diffusion, and the Pd layer on top (0.5 m min.) ensures effective wire bonding.
Terminal
Normal
PCB land
Solder resist mask
Stencil mask
All dimensions in mm
0.05 b1 b Corner 0.05 b2 b2 b 0.05 b1
0.05
Solder land Solder resist Solder stencil For exact dimensions see package outline drawing (SOT639-2)
0.05
0.05
b2 Cavity
b2
0.05 0.05
0.05 0.3 (8x) Stencil print thickness: 0.1 to 0.12 mm
Eh
Eh
0.1 (4x)
004aaa123
Dh
Dh 0.05
Cavity: exposed diepad, either functioning as heatsink or as ground connection; only for HBCC packages.
Fig 13. (H)BCC footprint and solder resist mask dimensions.
17.2 (H)BCC packages: reflow soldering profile
The conditions for reflow soldering of (H)BCC packages are as follows:
* Preheating time: minimum 90 s at T = 145 to 155 C * Soldering time: minimum 90 s (BCC) or minimum 100 s (HBCC) at T > 183 C * Peak temperature:
- Ambient temperature: Tamb(max) = 260 C - Device surface temperature: Tcase(max) = 255 C.
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Product data
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ISP1104
Advanced USB transceiver
18. Revision history
Table 17: Rev Date 01 20020826 Revision history CPCN Description Product data (9397 750 09784)
9397 750 09784
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Product data
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Advanced USB transceiver
19. Data sheet status
Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] [2]
Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
20. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
21. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com.
9397 750 09784
Fax: +31 40 27 24825
(c) Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 -- 26 August 2002
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Philips Semiconductors
ISP1104
Advanced USB transceiver
Contents
1 2 3 4 5 6 6.1 6.2 7 7.1 7.2 7.3 8 8.1 8.2 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 16.5 17 17.1 17.2 18 19 20 21 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 5 Function selection. . . . . . . . . . . . . . . . . . . . . . . 5 Operating functions. . . . . . . . . . . . . . . . . . . . . . 5 Power supply configurations . . . . . . . . . . . . . . . 6 Electrostatic discharge (ESD). . . . . . . . . . . . . . 7 ESD protection. . . . . . . . . . . . . . . . . . . . . . . . . 7 ESD test conditions . . . . . . . . . . . . . . . . . . . . . 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8 Recommended operating conditions. . . . . . . . 8 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8 Dynamic characteristics . . . . . . . . . . . . . . . . . 11 Test information . . . . . . . . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction to soldering surface mount packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . 16 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . 16 Manual soldering . . . . . . . . . . . . . . . . . . . . . . 17 Package related soldering information . . . . . . 17 Additional soldering information . . . . . . . . . . 18 (H)BCC packages: footprint . . . . . . . . . . . . . . 18 (H)BCC packages: reflow soldering profile. . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 19 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 20 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
(c) Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 26 August 2002 Document order number: 9397 750 09784


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